Набор инструментов, который я использую (linux, eclipse, arm, gcc-arm-none-eabi), хорошо работает для stm32f4xx при мигании с QStlink2.мигает STM32F745 с ошибкой QStlink2, но работает с stlink-gui
Для нового проекта, который использует stm32f745, я вижу, что это как-то не работает на уровне мигания сгенерированного файла .bin. Сам файл .bin - это хорошо, потому что когда я его запускаю с помощью stlink-gui, все работает нормально. Так что проблема в QStlink2
Я не застрял на данный момент, но хотел бы опубликовать это здесь, чтобы узнать, есть ли у кого-то еще одна проблема? Я также отправлю на страницу QStlink.
Когда я бегу инструмент, я получаю следующий результат (мои извинения, если это слишком долго)
Verbose level: 5
Version: 1.2.3
69 - Debug: Loading device list.
70 - Info: Devices list loaded.
70 - Debug: "RDPTR_KEY" -> 165
70 - Debug: "KEY1" -> 1164378403
70 - Debug: "KEY2" -> 3455027627
70 - Debug: "OPTKEY1" -> 135866939
70 - Debug: "OPTKEY2" -> 1281191551
70 - Debug: "SR_BSY" -> 0
70 - Debug: "SR_PER" -> 2
70 - Debug: "SR_EOP" -> 5
70 - Debug: "CR_PG" -> 0
70 - Debug: "CR_PER" -> 1
70 - Debug: "CR_MER" -> 2
70 - Debug: "CR_STRT" -> 6
70 - Debug: "CR_LOCK" -> 7
70 - Debug: "CR_PGSIZE" -> 8
70 - Debug: "ACR_OFFSET" -> 0
70 - Debug: "KEYR_OFFSET" -> 4
70 - Debug: "OPT_KEYR_OFFSET" -> 8
70 - Debug: "SR_OFFSET" -> 12
70 - Debug: "CR_OFFSET" -> 16
70 - Debug: "AR_OFFSET" -> 20
70 - Debug: "OBR_OFFSET" -> 28
70 - Debug: "WRPR_OFFSET" -> 32
70 - Debug: "devices_default" -> "flash_base"
70 - Debug: "devices_default" -> "sram_base"
70 - Debug: "devices_default" -> "buffer_size"
70 - Debug: "devices_default" -> "flash_size"
70 - Debug: "devices_default" -> "flash_pgsize"
70 - Debug: "device" -> "STM32L03xx" -> "core_id"
70 - Debug: "device" -> "STM32L03xx" -> "chip_id"
70 - Debug: "device" -> "STM32L03xx" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L03xx" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L03xx" -> "buffer_size"
70 - Debug: "device" -> "STM32L03xx" -> "loader"
70 - Debug: "device" -> "STM32L05xx" -> "core_id"
70 - Debug: "device" -> "STM32L05xx" -> "chip_id"
70 - Debug: "device" -> "STM32L05xx" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L05xx" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L05xx" -> "buffer_size"
70 - Debug: "device" -> "STM32L05xx" -> "loader"
70 - Debug: "device" -> "STM32L07xx" -> "core_id"
70 - Debug: "device" -> "STM32L07xx" -> "chip_id"
70 - Debug: "device" -> "STM32L07xx" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L07xx" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L07xx" -> "buffer_size"
70 - Debug: "device" -> "STM32L07xx" -> "loader"
70 - Debug: "device" -> "STM32L1xx (Low/Med Density)" -> "core_id"
70 - Debug: "device" -> "STM32L1xx (Low/Med Density)" -> "chip_id"
70 - Debug: "device" -> "STM32L1xx (Low/Med Density)" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L1xx (Low/Med Density)" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L1xx (Low/Med Density)" -> "buffer_size"
70 - Debug: "device" -> "STM32L1xx (Low/Med Density)" -> "loader"
70 - Debug: "device" -> "STM32L1xx (High Density)" -> "core_id"
70 - Debug: "device" -> "STM32L1xx (High Density)" -> "chip_id"
70 - Debug: "device" -> "STM32L1xx (High Density)" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L1xx (High Density)" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L1xx (High Density)" -> "buffer_size"
70 - Debug: "device" -> "STM32L1xx (High Density)" -> "loader"
70 - Debug: "device" -> "STM32L1xx cat2" -> "core_id"
70 - Debug: "device" -> "STM32L1xx cat2" -> "chip_id"
70 - Debug: "device" -> "STM32L1xx cat2" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L1xx cat2" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L1xx cat2" -> "buffer_size"
70 - Debug: "device" -> "STM32L1xx cat2" -> "loader"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "core_id"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "chip_id"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "buffer_size"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "loader"
70 - Debug: "device" -> "STM32L1xx cat5/6" -> "core_id"
70 - Debug: "device" -> "STM32L1xx cat5/6" -> "chip_id"
70 - Debug: "device" -> "STM32L1xx cat5/6" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L1xx cat5/6" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L1xx cat5/6" -> "buffer_size"
70 - Debug: "device" -> "STM32L1xx cat5/6" -> "loader"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "core_id"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "chip_id"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "buffer_size"
70 - Debug: "device" -> "STM32L1xx (Dual Flash Banks)" -> "loader"
70 - Debug: "device" -> "STM32L4xx" -> "core_id"
70 - Debug: "device" -> "STM32L4xx" -> "chip_id"
70 - Debug: "device" -> "STM32L4xx" -> "flash_size_reg"
70 - Debug: "device" -> "STM32L4xx" -> "flash_int_reg"
70 - Debug: "device" -> "STM32L4xx" -> "loader"
70 - Debug: "device" -> "STM32L4xx" -> "SR_BSY"
70 - Debug: "device" -> "STM32L4xx" -> "CR_STRT"
70 - Debug: "device" -> "STM32L4xx" -> "CR_LOCK"
70 - Debug: "device" -> "STM32L4xx" -> "CR_SER"
70 - Debug: "device" -> "STM32L4xx" -> "SR_PER"
70 - Debug: "device" -> "STM32L4xx" -> "CR_PGSIZE"
70 - Debug: "device" -> "STM32L4xx" -> "buffer_size"
70 - Debug: "device" -> "STM32F05x" -> "core_id"
70 - Debug: "device" -> "STM32F05x" -> "chip_id"
70 - Debug: "device" -> "STM32F05x" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F05x" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F05x" -> "buffer_size"
70 - Debug: "device" -> "STM32F05x" -> "loader"
70 - Debug: "device" -> "STM32F03x" -> "core_id"
70 - Debug: "device" -> "STM32F03x" -> "chip_id"
70 - Debug: "device" -> "STM32F03x" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F03x" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F03x" -> "buffer_size"
70 - Debug: "device" -> "STM32F03x" -> "loader"
70 - Debug: "device" -> "STM32F04x" -> "core_id"
70 - Debug: "device" -> "STM32F04x" -> "chip_id"
70 - Debug: "device" -> "STM32F04x" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F04x" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F04x" -> "buffer_size"
70 - Debug: "device" -> "STM32F04x" -> "loader"
70 - Debug: "device" -> "STM32F07x" -> "core_id"
70 - Debug: "device" -> "STM32F07x" -> "chip_id"
70 - Debug: "device" -> "STM32F07x" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F07x" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F07x" -> "buffer_size"
70 - Debug: "device" -> "STM32F07x" -> "loader"
70 - Debug: "device" -> "STM32F100" -> "core_id"
70 - Debug: "device" -> "STM32F100" -> "chip_id"
70 - Debug: "device" -> "STM32F100" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F100" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F100" -> "buffer_size"
70 - Debug: "device" -> "STM32F100" -> "loader"
70 - Debug: "device" -> "STM32F10x (Low Density)" -> "core_id"
70 - Debug: "device" -> "STM32F10x (Low Density)" -> "chip_id"
70 - Debug: "device" -> "STM32F10x (Low Density)" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F10x (Low Density)" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F10x (Low Density)" -> "buffer_size"
70 - Debug: "device" -> "STM32F10x (Low Density)" -> "loader"
70 - Debug: "device" -> "STM32F10x (Medium Density)" -> "core_id"
70 - Debug: "device" -> "STM32F10x (Medium Density)" -> "chip_id"
70 - Debug: "device" -> "STM32F10x (Medium Density)" -> "flash_size_reg"
70 - Debug: "device" -> "STM32F10x (Medium Density)" -> "flash_int_reg"
70 - Debug: "device" -> "STM32F10x (Medium Density)" -> "buffer_size"
70 - Debug: "device" -> "STM32F10x (Medium Density)" -> "loader"
70 - Debug: "device" -> "STM32F10x (High Density)" -> "core_id"
70 - Debug: "device" -> "STM32F10x (High Density)" -> "chip_id"
71 - Debug: "device" -> "STM32F10x (High Density)" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F10x (High Density)" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F10x (High Density)" -> "buffer_size"
71 - Debug: "device" -> "STM32F10x (High Density)" -> "loader"
71 - Debug: "device" -> "STM32F10x (XL Density)" -> "core_id"
71 - Debug: "device" -> "STM32F10x (XL Density)" -> "chip_id"
71 - Debug: "device" -> "STM32F10x (XL Density)" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F10x (XL Density)" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F10x (XL Density)" -> "buffer_size"
71 - Debug: "device" -> "STM32F10x (XL Density)" -> "loader"
71 - Debug: "device" -> "STM32F10x (Connectivity)" -> "core_id"
71 - Debug: "device" -> "STM32F10x (Connectivity)" -> "chip_id"
71 - Debug: "device" -> "STM32F10x (Connectivity)" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F10x (Connectivity)" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F10x (Connectivity)" -> "buffer_size"
71 - Debug: "device" -> "STM32F10x (Connectivity)" -> "loader"
71 - Debug: "device" -> "STM32F2xx" -> "core_id"
71 - Debug: "device" -> "STM32F2xx" -> "chip_id"
71 - Debug: "device" -> "STM32F2xx" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F2xx" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F2xx" -> "buffer_size"
71 - Debug: "device" -> "STM32F2xx" -> "loader"
71 - Debug: "device" -> "STM32F301" -> "core_id"
71 - Debug: "device" -> "STM32F301" -> "chip_id"
71 - Debug: "device" -> "STM32F301" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F301" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F301" -> "buffer_size"
71 - Debug: "device" -> "STM32F301" -> "loader"
71 - Debug: "device" -> "STM32F303xB/C" -> "core_id"
71 - Debug: "device" -> "STM32F303xB/C" -> "chip_id"
71 - Debug: "device" -> "STM32F303xB/C" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F303xB/C" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F303xB/C" -> "buffer_size"
71 - Debug: "device" -> "STM32F303xB/C" -> "loader"
71 - Debug: "device" -> "STM32F303x6/8" -> "core_id"
71 - Debug: "device" -> "STM32F303x6/8" -> "chip_id"
71 - Debug: "device" -> "STM32F303x6/8" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F303x6/8" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F303x6/8" -> "buffer_size"
71 - Debug: "device" -> "STM32F303x6/8" -> "loader"
71 - Debug: "device" -> "STM32F303xD/E" -> "core_id"
71 - Debug: "device" -> "STM32F303xD/E" -> "chip_id"
71 - Debug: "device" -> "STM32F303xD/E" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F303xD/E" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F303xD/E" -> "buffer_size"
71 - Debug: "device" -> "STM32F303xD/E" -> "loader"
71 - Debug: "device" -> "STM32F37x" -> "core_id"
71 - Debug: "device" -> "STM32F37x" -> "chip_id"
71 - Debug: "device" -> "STM32F37x" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F37x" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F37x" -> "buffer_size"
71 - Debug: "device" -> "STM32F37x" -> "loader"
71 - Debug: "device" -> "STM32F401xB/C" -> "core_id"
71 - Debug: "device" -> "STM32F401xB/C" -> "chip_id"
71 - Debug: "device" -> "STM32F401xB/C" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F401xB/C" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F401xB/C" -> "loader"
71 - Debug: "device" -> "STM32F401xB/C" -> "SR_BSY"
71 - Debug: "device" -> "STM32F401xB/C" -> "CR_STRT"
71 - Debug: "device" -> "STM32F401xB/C" -> "CR_LOCK"
71 - Debug: "device" -> "STM32F401xB/C" -> "CR_SER"
71 - Debug: "device" -> "STM32F401xB/C" -> "SR_PER"
71 - Debug: "device" -> "STM32F401xB/C" -> "CR_PGSIZE"
71 - Debug: "device" -> "STM32F401xB/C" -> "buffer_size"
71 - Debug: "device" -> "STM32F401xD/E" -> "core_id"
71 - Debug: "device" -> "STM32F401xD/E" -> "chip_id"
71 - Debug: "device" -> "STM32F401xD/E" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F401xD/E" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F401xD/E" -> "loader"
71 - Debug: "device" -> "STM32F401xD/E" -> "SR_BSY"
71 - Debug: "device" -> "STM32F401xD/E" -> "CR_STRT"
71 - Debug: "device" -> "STM32F401xD/E" -> "CR_LOCK"
71 - Debug: "device" -> "STM32F401xD/E" -> "CR_SER"
71 - Debug: "device" -> "STM32F401xD/E" -> "SR_PER"
71 - Debug: "device" -> "STM32F401xD/E" -> "CR_PGSIZE"
71 - Debug: "device" -> "STM32F401xD/E" -> "buffer_size"
71 - Debug: "device" -> "STM32F411xC/E" -> "core_id"
71 - Debug: "device" -> "STM32F411xC/E" -> "chip_id"
71 - Debug: "device" -> "STM32F411xC/E" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F411xC/E" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F411xC/E" -> "loader"
71 - Debug: "device" -> "STM32F411xC/E" -> "SR_BSY"
71 - Debug: "device" -> "STM32F411xC/E" -> "CR_STRT"
71 - Debug: "device" -> "STM32F411xC/E" -> "CR_LOCK"
71 - Debug: "device" -> "STM32F411xC/E" -> "CR_SER"
71 - Debug: "device" -> "STM32F411xC/E" -> "SR_PER"
71 - Debug: "device" -> "STM32F411xC/E" -> "CR_PGSIZE"
71 - Debug: "device" -> "STM32F411xC/E" -> "buffer_size"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "core_id"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "chip_id"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "loader"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "SR_BSY"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "CR_STRT"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "CR_LOCK"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "CR_SER"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "SR_PER"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "CR_PGSIZE"
71 - Debug: "device" -> "STM32F405/415/407/417x" -> "buffer_size"
71 - Debug: "device" -> "STM32F42x/43x" -> "core_id"
71 - Debug: "device" -> "STM32F42x/43x" -> "chip_id"
71 - Debug: "device" -> "STM32F42x/43x" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F42x/43x" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F42x/43x" -> "loader"
71 - Debug: "device" -> "STM32F42x/43x" -> "SR_BSY"
71 - Debug: "device" -> "STM32F42x/43x" -> "CR_STRT"
71 - Debug: "device" -> "STM32F42x/43x" -> "CR_LOCK"
71 - Debug: "device" -> "STM32F42x/43x" -> "CR_SER"
71 - Debug: "device" -> "STM32F42x/43x" -> "CR_PGSIZE"
71 - Debug: "device" -> "STM32F42x/43x" -> "buffer_size"
71 - Debug: "device" -> "STM32F7xx" -> "core_id"
71 - Debug: "device" -> "STM32F7xx" -> "chip_id"
71 - Debug: "device" -> "STM32F7xx" -> "flash_size_reg"
71 - Debug: "device" -> "STM32F7xx" -> "flash_int_reg"
71 - Debug: "device" -> "STM32F7xx" -> "loader"
71 - Debug: "device" -> "STM32F7xx" -> "SR_BSY"
71 - Debug: "device" -> "STM32F7xx" -> "CR_STRT"
71 - Debug: "device" -> "STM32F7xx" -> "CR_LOCK"
71 - Debug: "device" -> "STM32F7xx" -> "CR_SER"
71 - Debug: "device" -> "STM32F7xx" -> "CR_PGSIZE"
71 - Debug: "device" -> "STM32F7xx" -> "buffer_size"
71 - Debug: New Transfer Thread
72 - Info: "32 Device descriptions loaded."
15421 - Debug: ***[ bool MainWindow::connect() ]***
15422 - Info: "Searching Device..."
15422 - Debug: ***[ void stlinkv2::flush() ]***
15449 - Info: "ST Link V2/Nucleo found!"
15449 - Info: "Fetching version..."
15449 - Debug: ***[ stlinkv2::STVersion stlinkv2::getVersion() ]***
15449 - Debug: ***[ void stlinkv2::setExitModeDFU() ]***
15449 - Info: "Changing mode to SWD..."
15449 - Debug: ***[ void stlinkv2::setModeSWD() ]***
15449 - Debug: ***[ quint8 stlinkv2::getMode() ]***
15450 - Debug: ***[ void stlinkv2::setExitModeDFU() ]***
15550 - Info: "Fetching mode..."
15550 - Debug: ***[ quint8 stlinkv2::getMode() ]***
15550 - Info: "Mode: Debug"
15550 - Info: "Fetching status..."
15550 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
15551 - Info: "Status: Core Running"
15551 - Info: "Fetching MCU Info..."
15551 - Debug: ***[ quint32 stlinkv2::getCoreID() ]***
15551 - Info: CoreID: 5BA02477
15551 - Debug: ***[ void stlinkv2::resetMCU() ]***
15552 - Debug: ***[ quint32 stlinkv2::getChipID() ]***
15552 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at E0042000"
15553 - Info: CM3/4 Searching at E0042000
15553 - Info: ChipID: 0x449
15553 - Debug: Looking for: 0x449
15553 - Debug: Found chipID
15553 - Info: Device type: "STM32F7xx"
15553 - Debug: ***[ quint32 stlinkv2::readFlashSize() ]***
15553 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 1FF0F442"
15553 - Info: Flash size: 49152 KB
30225 - Info: "Size: 31KB"
31411 - Debug: Writing flash
31412 - Info: "Sending /home/marleen/workspace/eclipse-kepler/argus_eclipse/Debug/argus_eclipse.bin"
31412 - Debug: ***[ void stlinkv2::resetMCU() ]***
31413 - Info: Using loader
31413 - Debug: ***[ void stlinkv2::hardResetMCU() ]***
31423 - Info: Writing from 08000000 to 08007c6f
31423 - Debug: ***[ void stlinkv2::resetMCU() ]***
31427 - Debug: ***[ void stlinkv2::flush() ]***
31454 - Info: Loader ":/bin/loader_f4.bin"
31454 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 128 bytes to 0x20000000"
31455 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 128 bytes to 0x20000080"
31456 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 128 bytes to 0x20000100"
31457 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 128 bytes to 0x20000180"
31459 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 128 bytes to 0x20000200"
31460 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 128 bytes to 0x20000280"
31461 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 92 bytes to 0x20000300"
31463 - Debug: ***[ bool stlinkv2::writeRegister(quint32, quint8) ]***
31463 - Debug: ***[ quint32 stlinkv2::readRegister(quint8) ]***
31464 - Debug: Set register 15 to 20000000
31464 - Debug: ***[ void stlinkv2::runMCU() ]***
31464 - Info: "Loader uploaded"
31464 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
31464 - Debug: ***[ quint32 stlinkv2::readRegister(quint8) ]***
31465 - Debug: Current PC reg at 200000b2
31465 - Debug: ***[ void stlinkv2::flush() ]***
31492 - Debug: Read Bytes 30720 from disk
31492 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 4 bytes to 0x200007D0"
31492 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 4 bytes to 0x200007D4"
31492 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007D0"
31492 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007D4"
31493 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20000800"
31512 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20001000"
31533 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20001800"
31553 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20002000"
31573 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20002800"
31593 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20003000"
31614 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20003800"
31634 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20004000"
31654 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20004800"
31674 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20005000"
31695 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20005800"
31715 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20006000"
31735 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20006800"
31756 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20007000"
31776 - Debug: ***[ qint32 stlinkv2::writeMem32(quint32, const QByteArray&) ]*** "Writing 2048 bytes to 0x20007800"
31796 - Debug: ***[ bool stlinkv2::writeRegister(quint32, quint8) ]***
31797 - Debug: ***[ quint32 stlinkv2::readRegister(quint8) ]***
31798 - Debug: Set register 15 to 200000B4
31798 - Debug: ***[ void stlinkv2::runMCU() ]***
31798 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
31798 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
31798 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
31798 - Debug: Loader position: 0x8000000
31829 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
31829 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
31829 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
...
31952 - Debug: Loader position: 0x8000000
31982 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
31983 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
31983 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
31983 - Debug: Loader position: 0x8000000
32012 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32013 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
32013 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
32013 - Debug: Loader position: 0x8000000
32043 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32043 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
32044 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
32044 - Debug: Loader position: 0x8000000
32074 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32074 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
32074 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
32075 - Debug: Loader position: 0x8000000
5 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
5 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
5 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
6 - Debug: Loader position: 0x8000000
32136 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32136 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
32136 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
32137 - Debug: Loader position: 0x8000000
32167 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32167 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
32167 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
32167 - Debug: Loader position: 0x8000000
32198 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32198 - Debug: ***[ quint32 stlinkv2::getLoaderPos() ]***
32198 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007DC"
32198 - Debug: Loader position: 0x8000000
32229 - Debug: ***[ quint8 stlinkv2::getStatus() ]***
32230 - Debug: ***[ quint32 stlinkv2::getLoaderStatus() ]***
32230 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 200007D8"
32230 - Error: Loader reported an error!
32230 - Debug: ***[ quint32 stlinkv2::readRegister(quint8) ]***
32230 - Debug: Current PC reg 200000b2
32230 - Info: Transfer done
32230 - Debug: ***[ void stlinkv2::hardResetMCU() ]***
32234 - Info: "Transfer done"
32241 - Debug: ***[ void stlinkv2::resetMCU() ]***
32244 - Debug: ***[ void stlinkv2::runMCU() ]***
35319 - Debug: Verify flash
37182 - Info: "Verifying /home/marleen/workspace/eclipse-kepler/argus_eclipse/Debug/argus_eclipse.bin"
37182 - Debug: ***[ void stlinkv2::hardResetMCU() ]***
37193 - Info: Reading from 08000000 to 08007c70
37193 - Debug: ***[ void stlinkv2::flush() ]***
37221 - Debug: ***[ qint32 stlinkv2::readMem32(QByteArray*, quint32, quint16) ]*** "Reading at 08000000"
37243 - Error: Verification failed at 08000000
Expecting: 00 00 05 20 DD 02 00 08 E1 4E 00 08 E5 4E 00 08 E9 4E 00 08 ED 4E 00 08 F1 4E 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 25 58 00 08 F5 4E 00 08 00 00 00 00 C1 58 00 08 F9 4E 00 08 29 42 00 08 29 42 ...
6D 5D 4B
Got:FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ...
FF FF FF
37243 - Debug: ***[ void stlinkv2::runMCU() ]***
2689151 - Info: "Disconnecting..."
2689152 - Debug: Closing USB connection...
2689152 - Info: "Disconnected."
2690109 - Info: "Transfer Aborted"
Действительно ли QStlink2 поддерживает устройства F7? По внешнему виду этого журнала, похоже, он рассматривает его как F4; должен ли F4-алгоритм работать на F7, я не знаю, но это скорее предполагает, что это не так ... – Notlikethat
В журнале есть часть, в которой упоминается STM32F7xx: 71 - Отладка: «устройство» - > "STM32F7xx" -> "core_id" ... – user2025465